Example embodiments of the inventive concepts described herein relate to a semiconductor device, and more particularly, relate to a method of designing a layout of a semiconductor device.
Usage of mobile devices such as a smart-phone, a tablet personal computer (PC), a digital camera, a MP3 player, and a personal digital assistant (PDA) is significantly increasing. As driving of multimedia and throughput of various data increase in this mobile device, a high-speed processor is largely applied to the mobile device. Various application programs may be driven on a mobile device. To drive various application programs, semiconductor devices such as a working memory (e.g., DRAM), a nonvolatile memory, and an application processor (AP) are used in the mobile device.
Lithography equipment may be quickly developed as compared with a scaled-down version of a design rule. Accordingly, example embodiments of methods of implementing a smaller pitch than a minimum and/or desired pitch implemented using lithography equipment are being studied. In at least one example embodiment, the method includes a self-align double patterning (hereafter referred to as “SADP”) process. A structure of a smaller pitch than a minimum and/or desired pitch implemented using the lithography equipment may be formed using the SADP process. Accordingly, a semiconductor device having a fine pattern or a high degree of integration over a limitation of the lithography equipment may be easily formed using the SADP process.
When a layout design for the SADP is performed, constraint conditions based on a characteristic of the SADP is observed. Example embodiments of the inventive concepts may provide design and verification methods for easily implementing a layout of the semiconductor device manufactured using a SADP process.